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Paṭisambhidā Jāla-Abaddha Paripanti Tipiṭaka Anvesanā ca Paricaya Nikhilavijjālaya ca ñātibhūta Pavatti Nissāya 
http://sarvajan.ambedkar.org anto 105 Seṭṭhaganthāyatta Bhāsā
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2096 Mon 2 Jan 2017 LESSONS from Rector JCMesh J Alphabets Letter Animation ClipartMesh C Alphabets Letter Animation Clipart an expert who identifies experts influenced by Expert and Infulencer Sashikanth Chandrasekharan of Free Online Buddhism - World Religions for Kidshttps://drambedkarbooks.com/2015/03/14/the-chamcha-age-by-saheb-kanshi-ram/#more-1506Awaken One With Awareness Mind (A1wAM)+ ioT (insight-net of Things) - the art of Giving, taking and Living to attain Eternal Bliss as Final Goal through Electronic Visual Communication Course on Political Science -Techno-Politico-Socio Transformation and Economic Emancipation Movement (TPSTEEM). Struggle hard to see that all fraud EVMs are replaced by paper ballots by Start using Internet of things by creating Websites, blogs. Make the best use of facebook, twitter etc., to propagate TPSTEEM thru FOA1TRPUVF. Practice Insight Meditation in all postures of the body - Sitting, standing, lying, walking, jogging, cycling, swimming, martial arts etc., for health mind in a healthy body. from INSIGHT-NET-Hi Tech Radio Free Animation Clipart Online A1 (Awakened One) Tipiṭaka Research & Practice University in Visual Format (FOA1TRPUVF) https://archive.org/stream/DhammapadaIllustrated/dhammapada_illustrated#page/n1/mode/2up free online university research practice up a level through http://sarvajan.ambedkar.orgup a level https://awakenmediaprabandhak. wordpress.com/ email-0565.gif from 123gifs.eu Download & Greeting Card modinotourpm@gmail.com jchandra1942@icloud.com sarvajanow@yahoo.co.in is the most Positive Energy of informative and research oriented site propagating the teachings of the Awakened One with Awareness the Buddha and on Techno-Politico-Socio Transformation and Economic Emancipation Movement followed by millions of people all over the world in 105 Classical languages. Rendering exact translation as a lesson of this University in one’s mother tongue to this Google Translation and propagation entitles to become a Stream Enterer (Sottapanna) and to attain Eternal Bliss as a Final Goal BSP is the Number One Largest Party in the Country with all societies (sarvajan Samaj ) supporting it for Sarvajan Hitay sarvajan Sukhaya http://media.photobucket.com/…/InternetExplorerWallpaper.jp… http://www.countercurrents.org/…/digital-fiance-must-be-hu…/ http://www.countercurrents.org/…/demonetisation-bhasmasurs…/ http://www.countercurrents.org/…/modis-new-year-eve-speech…/ After 52 painful cashless days,what Murderer of democratic institutions (Modi) had to say this time. http://www.business-standard.com/…/why-demonetisation-is-gr… Why demonetisation is greatest blunder by a govt in 69 years of free Nation. http://media.photobucket.com/…/_Eve96_/media/SAMMAKKOMODI.g… Murderer of democratic institutions (Modi) said the the country’s banking system has never received such a large amount of money in a such a short time telling like due to his efforts people voluntarily deposited in banks. D. Section on Repulsiveness
Filed under: Vinaya Pitaka, Sutta Pitaka, Abhidhamma Pitaka, Tipiṭaka
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http://blogs.timesofindia.indiatimes.com/…/with-eye-on-mus…/ LUCKNOW: BSP chief Mayawati went back to her drawing board to devise her electoral strategy afresh ahead of the UP elections, which will determine her political fortunes.After 52 painful cashless days,what Murderer of democratic institutions (Modi) had to say this time.
Filed under: Vinaya Pitaka, Sutta Pitaka, Abhidhamma Pitaka, Tipiṭaka
Posted by: site admin @ 8:13 pm




http://blogs.timesofindia.indiatimes.com/…/with-eye-on-mus…/


LUCKNOW: BSP chief Mayawati went back to her drawing board to devise
her electoral strategy afresh ahead of the UP elections, which will
determine her political fortunes.

Mayawati believes that the feud
between the camps of Akhilesh Yadav and his uncle Shivpal may still be
simmering at the grassroots.

“That still gives Behenji a chance to bank on the uncertainty within the SP file and consolidate Muslim votes,


Mayawati has asked BSP functionaries to work quietly in their
constituencies and focus on consolidation of SC/STs and Muslims of the
total electorate plus OBC/MBC/poor upper castes of Sarvajan Samaj which
together account for more than 90%

Mayawati has not only asked
her Muslim officials to hasten public meetings in Muslim areas but also
concentrate on regions which have sizeable population of non-Yadav OBCs,
essentially the most backward castes (MBCs). They are a part of the
ongoing Bhaichara committee meetings to mobilise voters of the upper
castes

“Zonal coordinators have been asked to bring in MBC cadres
and rake up the issue of their being denied enough share in the
reservation bracket under the OBC,“ said a senior BSP leader. – Pankaj
Shah (TNN)

Just 1% intolerant, terrorist, horrorist, violent,
militant, lunatic, mentally retarded cannibal chitpawan brahmin and
their stooges, Chas“Zonal coordinators have been asked to bring in MBC
cadres and rake up the issue of their being denied enough share in the
reservation bracket under the OBC,“ said a senior BSP leader. – Pankaj
Shah (TNN), chelas, boot lickers and own mothers flesh eaters of RSS
(Rakshasa Swayam Sevaks are now scared of Ms Mayawati for her policy of
Sarvajan Hitay Sarvajan Sukhaya where all the castes, religions have
realised the importance of unity as a single race of this country. The
politics of hatred, anger, jealousy and delusion of the mind which is
madness is drawing to an end. Mayawati proved with her best governance
of UP to bring all societies together. They wholeheartedly want he to be
the next PM of Prabuddha Bharath. But for the fraud EVMs that helped
Modi to gobble the Master Key Bahuth Jiyadha Psychopaths would be no
where. The present CEC says that only in 2019 entire EVMs woud be
replaced. While the ex CJI committed a grave error of judgement by
ordering for the EVMs to be replaced in a phased manner as suggested by
the ex CEC because of the cost of 1600 crores. Only 8 out of 543 seats
in 2014 Lok sabha elections were replaced. Now for 2017 UP elections
only in 20 seats the fraud EVMs are to be replaced. All democracy loving
people the CJI, CEC must see to it that paper ballots are used until
entire EVMs were replaced. Before that the central and stste governments
dselected by these fraud EVMs must be dissolved and go for fresh polls
with paper ballots till entire EVMs are replaced.


LUCKNOW:
BSP chief Mayawati went back to her drawing board to devise her
electoral strategy afresh ahead of the UP elections, which will
determine her…
blogs.timesofindia.indiatimes.com

http://media.photobucket.com/…/InternetExplorerWallpaper.jp…

http://www.countercurrents.org/…/digital-fiance-must-be-hu…/

http://www.countercurrents.org/…/demonetisation-bhasmasurs…/

http://www.countercurrents.org/…/modis-new-year-eve-speech…/


After 52 painful cashless days,what Murderer of democratic institutions
(Modi) had to say this time. The whole nation glued to the TV sets to
hear Modi’s speech. He also had said ‘wait for 50 days or hang me in
public if I’m proved wrong’ and at the same time ‘I will not be cowed
down by anyone even if I am burnt alive’ people guessing as to how
anyone could be cowed down after his cremation. May be in his punar
janma. . What did he say? Nothing! Nothing? Not yet, but Everything!

Demonetisation: Bhasmasur’s Dance Of Death
by Vijaya Kumar Marla


People are known to take any injustice in to their stride, with our
all powerful karma siddhanta teaching us that your sufferings are the
result of your own sins in your past janam. Let us hope that people will
wake up before this Bhasmasur wreaks total havoc with the economy and
ruins the lives of the 1.28 billion Indians.

Digital Fiance Must Be Humane If It Is To Succeed
by Moin Qazi


We will have to sign off 2016 with a cultural baggage of a new
vocabulary which elderly and illiterate country people may not be
comfortable with , but have to embrace it in order to honour Modi since
the new rules of democracy leave them with little choice. . Most of the
conversations in the new year we will have much to do with the phrase
“digital finance that has suddenly acquired a magical nuance. Amazingly
even the laity has started tapping into the buzz of digital finance.
Specialist phrases like “cashless economy” and “plastic money” are now
being freely tossed in everyday conversations.


Dance Club Massacre Wallpaper - See this image on Photobucket.
s1000.photobucket.com

<http://www.business-standard.com/…/search/…/prem-shankar-jha>

http://www.business-standard.com/…/why-demonetisation-is-gr…

Why demonetisation is greatest blunder by a govt in 69 years of free Nation.

For one, everyone seems to have forgotten that if new notes are of a
different size, ATMs won’t work.

December 30, the deadline
<http://www.business-standard.com/search?type=news&q=Deadline>
Murderer of democratic institutions (Modi) set for completing his exercise in DEMON demonetisation
<http://www.business-standard.com/search…>has
come and gone, and there is now no room to doubt that it was the single greatest blunder
<http://www.business-standard.com/search?type=news&q=Blunder>that
any government has made in the 69 years that Nation has been free. On
November 8,Modi demonetised 20 billion bank notes, accounting for 86 per
cent of the cash in circulation in the Indian economy. But only a
fraction of the new currency notes needed to replace them had been
printed. As if this was not inept enough ‘somebody’, that is to say
everybody from Modi to the head of the Reserve Bank, ‘forgot’ that if
the new notes were of a different size from the old, the ATMs would not
work. The result was that, like a car engine run without lubricating
oil, the economy simply seized up.

The impact on the economy has not only been catastrophic but highly
unequal. Those with bank accounts and credit cards were merely
inconvenienced. Those who earn and spend mostly, or entirely in cash,
found themselves rendered penniless overnight. These were the poor of
India.

Banks still account for only a little over 30 percent of total credit
extended in the country. The balance comes from moneylenders who deal
in cash. That credit collapsed. In terms of value the proportion of
transactions that has been digitized is also about the same. But this
figure is deceptive because in numbers around 90 percent of
transactions still take place in cash. This entire segment – the lion’s
share—of the economy is now paralysed.

The fewer are the
transactions in the economy, the lower is the income they generate.
There is now a consensus among economists and bankers, therefore, that
the GDP will shrink in the second half of this fiscal year. Shortly
after the demonetisation
<http://www.business-standard.com/search…>Goldman
Sachs slashed its growth estimate for the second half of the year by
1.6 percent and predicted that the GDP would grow by 6.8 percent. This
was 0.8 per cent below its original estimate. Deutsche bank similarly
estimated that the annual growth would be around 6.5 percent. But the
most pessimistic estimate was that of Ambit Capital which forecast that
the economy would actually shrink in the remainder of the year, and
bring theannual growth rate down to only 3.5 percent for the year.

Anecdotal evidence suggests that Ambit’s estimate is likely to prove
closest to the mark. 90 percent of India’s more than 300 million
non-agricultural unorganized labour is paid daily or weekly in cash.


To pay them their employers have to have that cash first. The
government’s severe weekly withdrawal limits have made it virtually
impossible to pay these workers in the new legal tender. So far
employers were paying the in old notes and asking them to convert these
into the new money.

But this loophole has been shrinking and will shut on December 30.


As a result, Mazdoor Nakas—casual labour markets– where many of these
workers congregate every morning in the search for work, now receive a
trickle of hopeful aspirants, as the news has spread that their
employers, mostly in the construction, do not have the cash with which
to pay them.

There is a swelling reverse stream of migrant
workers returning to their home villages, where the cash they have
managed to save before the calamity will last longer than in the city.
Sectoral information from organized industry for the month of November
was bleak: a 20 percent fall in auto sales, 35 to 40 per cent in two
wheelers, 63 per cent in tractors.

But the most severe crunch has
taken place in the rural areas, where nearly all transactions are in
cash and there are far fewer banks. The
demonetisation
<http://www.business-standard.com/search…>occurred
just as farmers in north India in particular were selling their Kharif crop
and making their purchases for the Rabi. There is some preliminary
which suggest that the area sown with Rabi crops has therefore shrunk
but the full impact upon the Rabi will only be known as the crop ripens.
What is certain is that farmers all over India have minimized their
purchases of non-essential goods. This will killthe fillip that the
bumper Kharif
harvest would have given to the consumer goods industries.


Modi has sought to reassure the people that this is only a short term,
and necessary pain that the people have to suffer, to cleanse the black
money of corruption and black money. Once it is over the economy will
not only revive, but emerge stronger than ever. This is wishful
thinking.

For the sharp cut in spending that has taken place
will last for the entire time, now estimated at up to six months more,
that it will take for all the old notes to be replaced. During all this
time spending will remain constrained so income growth will fall too.
This means that the decline in consumer spending will persist.

This will force manufacturers to cut production in order to clear their
unsold stocks. That will cause a second round of reduction of orders
and retrenchment of employees, so another contraction in income and
expenditure. The economy will therefore continue to glide downwards till
it bottoms out. Left on its own the economy is likely to take another
two years to recover. By hen 2019 will have come and gone, and so will
Modi.

If Modi wishes to revive the economy quickly enough to recoup his
party’s political fortunes, he will have to give it a huge jolt, not unlike
the electric shock given to patients suffering a cardiac arrest. The only
way in which he can do that is through a huge cut in interest rates. By
this I do not mean a cut of 50 or even 100 basis points in policy
rates. I mean a slew of changes in various policy rates that will bring
the lending rates of the commercial banks lend to investors of five to
seven percent below the banks down to at most five per cent; that is six
to seven percent below that rates that had prevailed before
demonetisation.

A cut of this magnitude will enable India’s dying infrastructure and real
estate companies to refinance their debt and thereby halve their
interest costs. This alone will enable a large proportion of these
companies to pull out of the red and take up many of the Rs 8,80,000
crore worth of ‘stalled’ projects that they abandoned when interest
rates began to rise, and industrial growth to sink, six years ago.


A halving of bank lending rates will also revive the real estate sector
as millions of home buyers will once more be able to meet their monthly
installment payments, and give a huge fillip to the sale of consumer
durables that account for more than a quarter of manufacturing output.

But how will Modi bring interest rates down so sharply now , when
neither he nor his predecessor were able to persuade the RBI to do so
earlier, and when he has formally ceded the entire power to set them to
the RBI and its newly created monetary policy committee?

The
latter contains economists who, one presumes , are more sensitive to
economic growth issues than the bankers of the RBI, but even they will
be bound by the now official diktat of ‘inflation targeting’.

Inflation targeting requires central banks to keep lending rates in the
economy above the rate of inflation at all times. Its purpose is not
economic growth but financial stability, because doing so reassures all
our country people, and particularly foreign, holders of Iour country’s
money that Modi will not allow the value of their savings and
investment to depreciate. Advocates of inflation targeting claim that
growth will automatically pick up when prices and exchange rates
stabilize, but they are unable to describe the chain of cause and effect
that will make this happen. There is also very little evidence in the
experience of other countries that had adopted inflation targeting, to
buttress this claim.

On the contrary, South Korea’s two-decade
long surge to prosperity took place in the midst of a 21percent annual
rate of inflation and a continuous devaluation of the won to counteract
its impact upon external competitiveness.

In our country
inflation targeting, which has been the informal mantra of the RBI since
2006, has bestowed the kiss of death on industry, infrastructure,
construction, and therefore employment. This is because it does not
distinguish between inflation caused by an excess of demand in the
economy, which high rates can bring down, and one cause by shortages of
supply, whether of food grains, industrial raw materials ( usually a
reflection of rising global commodity prices), or labour which, by
curbing production, they can only intensify.

India’s cost of living index is sticky, and has diverged further and
further from the wholesale price index of inflation that the government
used earlier, because ever since 2007, its CPI inflation has reflected
local and global shortages, and not the state of domestic demand.
Judged by the latter, which is reflected both by the wholesale price
index and the GDP deflator, the true rate of demand inflation in the
country was zero or negative even before Modi exploded his
demonetisation
<http://www.business-standard.com/search…>
bombshell.


In our country inflation targeting will play a useful role if it keeps
interest rates two to three percent above the rate of demand inflation.


By that yardstick today even a five percent long term rate of interest
would be on the high side. So bringing commercial bank lending rates
down to this level is the minimum that Modi should do.


Peace Is Doable


Author - Prem Shankar Jha | Business Standard
Nowhere
is this more apparent than in the changes PM Modi has wrought to
India’s relations with its largest, and potentially most dangerous
neighbour, China
business-standard.com|By Business Standard

http://media.photobucket.com/…/_Eve96_/media/SAMMAKKOMODI.g…


Murderer of democratic institutions (Modi) said the the country’s
banking system has never received such a large amount of money in a such
a short time telling like due to his efforts people voluntarily
deposited in banks.

He is the biggest liar and shameless in the
country… Farmers in Punjab are going to kick hard his RSS puppet
badals-bjp-Congress alliance.

If you want to know the true image of Modi
Ask
A Widow Pensioner
A Veteran Army person
A Farmer
A SC/ST
A Poor Person
A Struggling Middle Class
A Sensible Brahmin
A Kashmiri Country people
A Secular Gujarati
A Secular Hyderabadi
A Sensible Tamil or Bengali

SAB Kahengey - CHOR CHOR MOD!!!CHOR CHOR MOD!!!CHOR CHOR MOD!!!

He should be given the world worst Actor award!!!
HAAR HAR(LOOSE LOOSE) MODI!!!HAAR HAAR(LOOSE LOOSE) MODI!!!HAAR HAAR(LOOSE LOOSE) MODI

D. Paṭikūlamanasikāra Pabba

Puna ca·paraṃ,
bhikkhave, bhikkhu imam·eva kāyaṃ, uddhaṃ pādatalā adho kesa·matthakā,
taca·pariyantaṃ pūraṃ nānappakārassa asucino paccavekkhati: ‘Atthi
imasmiṃ kāye kesā lomā nakhā dantā taco maṃsaṃ nhāru aṭṭhi aṭṭhimiñjaṃ
vakkaṃ hadayaṃ yakanaṃ kilomakaṃ pihakaṃ papphāsaṃ antaṃ antaguṇaṃ
udariyaṃ karīsaṃ pittaṃ semhaṃ pubbo lohitaṃ sedo medo assu vasā kheḷo
siṅghāṇikā lasikā muttaṃ’ ti. 


D. Section on Repulsiveness

Furthermore,
bhikkhus, a bhikkhu considers this very body, from the soles of the
feet up and from the hair on the head down, which is delimited by its
skin and full of various kinds of impurities: “In this kāya, there are
the hairs of the head, hairs of the body, nails, teeth, skin, flesh,
tendons, bones, bone marrow, kidneys, heart, liver, pleura, spleen,
lungs, intestines, mesentery, stomach with its contents, feces, bile,
phlegm, pus, blood, sweat, fat, tears, grease, saliva, nasal mucus,
synovial fluid and urine.” 

Seyyathāpi, bhikkhave, ubhatomukhā
putoḷi pūrā nānāvihitassa dhaññassa, seyyathidaṃ sālīnaṃ vīhīnaṃ
muggānaṃ māsānaṃ tilānaṃ taṇḍulānaṃ. Tamenaṃ cakkhumā puriso muñcitvā
paccavekkheyya: ‘Ime sālī ime vīhī, ime muggā, ime māsā, ime tilā, ime
taṇḍulā’ ti; evameva kho, bhikkhave, bhikkhu imam·eva kāyaṃ, uddhaṃ
pādatalā adho kesa·matthakā, taca·pariyantaṃ pūraṃ nānappakārassa
asucino paccavekkhati: ‘Atthi imasmiṃ kāye kesā lomā nakhā dantā taco
maṃsaṃ nhāru aṭṭhi aṭṭhimiñjaṃ vakkaṃ hadayaṃ yakanaṃ kilomakaṃ pihakaṃ
papphāsaṃ antaṃ antaguṇaṃ udariyaṃ karīsaṃ pittaṃ semhaṃ pubbo lohitaṃ
sedo medo assu vasā kheḷo siṅghāṇikā lasikā muttaṃ’ ti. 

Just as if,
bhikkhus, there was a bag having two openings and filled with various
kinds of grain, such as hill-paddy, paddy, mung beans, cow-peas, sesame
seeds and husked rice. A man with good eyesight, having unfastened it,
would consider [its contents]: “This is hill-paddy, this is paddy, those
are mung beans, those are cow-peas, those are sesame seeds and this is
husked rice;” in the same way, bhikkhus, a bhikkhu considers this very
body, from the soles of the feet up and from the hair on the head down,
which is delimited by its skin and full of various kinds of impurities:
“In this kāya, there are the hairs of the head, hairs of the body,
nails, teeth, skin, flesh, tendons, bones, bone marrow, kidneys, heart,
liver, pleura, spleen, lungs, intestines, mesentery, stomach with its
contents, feces, bile, phlegm, pus, blood, sweat, fat, tears, grease,
saliva, nasal mucus, synovial fluid and urine.”


Iti
ajjhattaṃ vā kāye kāyānupassī viharati, bahiddhā vā kāye kāyānupassī
viharati, ajjhatta-bahiddhā vā kāye kāyānupassī viharati;
samudaya-dhamm·ānupassī vā kāyasmiṃ viharati, vaya-dhamm·ānupassī vā
kāyasmiṃ viharati, samudaya-vaya-dhamm·ānupassī vā kāyasmiṃ viharati;
‘atthi kāyo’ ti vā pan·assa sati paccupaṭṭhitā hoti, yāvadeva
ñāṇa·mattāya paṭissati·mattāya,{1} a·nissito ca viharati, na ca kiñci
loke upādiyati. Evam·pi kho, bhikkhave, bhikkhu kāye kāyānupassī
viharati. 



Thus he dwells observing kāya in kāya internally, or he
dwells observing kāya in kāya externally, or he dwells observing kāya
in kāya internally and externally; he dwells observing the samudaya of
phenomena in kāya, or he dwells observing the passing away of phenomena
in kāya, or he dwells observing the samudaya and passing away of
phenomena in kāya; or else, [realizing:] “this is kāya!” sati is present
in him, just to the extent of mere ñāṇa and mere paṭissati, he dwells
detached, and does not cling to anything in the world. Thus, bhikkhus, a
bhikkhu dwells observing kāya in kāya. 


மேலும்,
பிக்குக்களுக்களே, ஒரு பிக்கு, இதே உடம்பில்,உச்சைந்தலை முடியிலிருந்து
கீழ்நோக்கி உள்ளங்கால் வரை, மெல்லிய தோல் மற்றும் பல்வேறு வகைப்பட்ட
அசுத்தம் நிறைந்த, ‘இந்த kāya, உடம்பு தலை முடி, உடம்புமுடி, நகம், பற்கள்,
மெல்லியல் தோல், தசை, தசை நாண், எலும்பு, எலும்புச்சோறு, சிறுநீரகம்,
இதயம், கல்லீரல்,மார்புவரி, மண்ணீரல், சுவாசப்பை,குடல், குடல்தாங்கி,
இரைப்பை அதனுடைய உள்ளடங்கல், மலம், பித்தநீர், கபம், சீழ், இரத்தம்,
வியர்வை, கொழுப்பு, கண்ணீர், மசகிடு, உமிழ்நீர், மூக்குச்சளி, உயவுநீர்மஞ்
சார்ந்த நீர்த்தன்மையுள்ள மற்றும் சிறுநீர் அதன் வரம்பிடலில் உள்ளது என
அறீவார்.

ஒருவேளை பிக்குக்களுக்களே,அங்கே ஒரு பை இரண்டு வாயில்கள்
உடையதாயிருப்பின், பல்வேறு  வகைப்பட்ட தானியம், குன்று நெல் பயிர், நெல்
பயிர், பச்சைப்பருப்பு, மாட்டு பட்டாணி, எள்ளு விதை, தொலியல். ஒரு மனிதன்
நல்ல பார்வையாற்றல் உடையவராயிருத்தல் கட்டு அவிழ்க்கப் பட்டவுடன் ஆழ்ந்து
ஆராய விரும்பி ,”இது குன்று நெல் பயிர்,நெல் பயிர், பச்சைப்பருப்பு, மாட்டு
பட்டாணி, எள்ளு விதை, தொலியல்என அறீவார்.” அதே போல்,  பிக்குக்களுக்களே,
ஒரு பிக்கு, இதே உடம்பில்,உச்சைந்தலை முடியிலிருந்து கீழ்நோக்கி உள்ளங்கால்
வரை, மெல்லிய தோல் மற்றும் பல்வேறு வகைப்பட்ட அசுத்தம் நிறைந்த, ‘இந்த
kāya, உடம்பு தலை முடி, உடம்புமுடி, நகம், பற்கள், மெல்லியல் தோல், தசை,
தசை நாண், எலும்பு, எலும்புச்சோறு, சிறுநீரகம், இதயம், கல்லீரல்,மார்புவரி,
மண்ணீரல், சுவாசப்பை,குடல், குடல்தாங்கி, இரைப்பை அதனுடைய உள்ளடங்கல்,
மலம், பித்தநீர், கபம், சீழ், இரத்தம், வியர்வை, கொழுப்பு, கண்ணீர்,
மசகிடு, உமிழ்நீர், மூக்குச்சளி, உயவுநீர்மஞ் சார்ந்த நீர்த்தன்மையுள்ள
மற்றும் சிறுநீர் அதன் வரம்பிடலில் உள்ளது என அறீவார்.

இவ்வாறு அவர்
kāya in kāya உடல்/காயத்தை காயதுக்குள் கண்காணி வாசம் செய்கிரார், அல்லது
காயத்தை காயதுக்கு வெளியே கண்காணி வாசம் செய்கிரார், அல்லது காயத்தை
காயதுக்கு உள்ளே மற்றும் வெளியே கண்காணி வாசம் செய்கிரார்;புலன்களால்
உணரத்தக்க எழுச்சி கண்காணி வாசம் செய்கிரார், மற்றும் புலன்களால்
உணரத்தக்கதை கடந்துசெல்லுவதை கண்காணித்து வாசம் செய்கிரார்; இல்லாவிடில்
எச்சரிக்கையாயிருக்கிற உணர் உடனிருக்கிறதை,சும்மா வெறும் ஓர்அளவு ஞானம்
மற்றும் ஓர்அளவு paṭissati என எண்ணி பற்றறு வாசம் செய்கிரார்.

http://i.imgur.com/GyFy8QT.gifv



http://tipitaka.org/

Buddha






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D. Paṭikūlamanasikāra PabbaMAJOR PROJECT ON CELL PHONE BASED VOTING MACHINE SUBMITTED IN THE PARTIAL FULFILLMENT OF REQUIRMENT- https://drive.google.com/file/d/0B3FeaMu_1EQybjhyU3RKcTMtQXc/view
Filed under: Vinaya Pitaka, Sutta Pitaka, Abhidhamma Pitaka, Tipiṭaka
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https://drive.google.com/file/d/0B3FeaMu_1EQybjhyU3RKcTMtQXc/view

Page 1 of 56

A

MAJOR PROJECT

ON

CELL PHONE BASED VOTING MACHINE

SUBMITTED IN THE PARTIAL FULFILLMENT OF REQUIRMENT

FOR THE AWARD OF THE DEGREE OF

BACHELOR OF TECHNOLOGY

IN

ELECTRONICS & COMMUNICATION ENGG.

FROM

KURUKSHETRA UNIVERSITY,KURUKSHETRA

SUBMITTED BY: GUIDED BY:

NIKHIL (1705429) Prof. G.C. Lall

HEMANT KUMAR (1705433) CO-GUIDED BY:

PRIYANSHU CHAUHAN (1705439) Asstt. Prof. Vijay Lamba

DEPTT. OF ELECTRONICS & COMMUNICATION ENGINEERING

HARYANA COLLEGE OF TECHNOLOGY & MANAGEMENT

AMBALA ROAD, KAITHAL-136027

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(i)

ACKNOWLEDGEMENT

Many lives & destinies are destroyed due to the lack of proper guidance, directions &

opportunities. It is in this respect I feel that I am in much better condition today due to

continuous process of motivation & focus provided by my parents & teachers in general. The

process of completion of this project was a tedious job & requires care & support at all stages. I

would like to highlight the role played by individuals towards this.

I am eternally grateful to honorable principal Dr. D.P. Gupta for providing us the opportunity &

infrastructure to complete the project as a partial fulfillment of B.Tech degree.

I am very thankful to Asst. Prof. Rajiv Chechi, Head of Department, for his kind support &

faith in us.

I would like to express my sincere thanks, with deep sense of gratitude to my project guide

Prof. G.C Lall for their keen interests my project.

I also thank Mr. Varun Sharma for his valuable help in our project.

I am also thankful to all visible & invisible hands which helped us to complete this project with a

feeling of success.

Nikhil (1705429)

Hemant Kumar (1705433)

Priyanshu Chauhan (1705439)

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(ii)

CERTIFICATE

We hereby certify the work which is being presented in the project entitled

“CELL PHONE BASED VOTING MACHINE” by “NIKHIL SHARMA, HEMANT

KUMAR, PRIYANSHU CAUHAN” in partial fulfillment of requirements for the award of

degree B.Tech (Electronics & Communication Engg.) submitted in the Department of

Electronics & Communication Engg. at Haryana College Of Technology & Management,

Kaithal under Kurukshetra University, Kurukshetra is carried out during a period from

August2008 to December2008 under the supervision of “Prof. G.C. Lall” Department of

Electronics & Communication Engineering, HCTM Kaithal. The matter presented in this project

has not been submitted by me in any other University/ Institue for the award of B.Tech. Degree.

NIKHIL SHARMA (1705429) HEMANT KUMAR (1705433)

PRIYANSHU CHAUHAN (1705439)

This is to certify that the above statement made by the candidate is correct to the best of my/our

knowledge.

Prof. G.C. Lall Asstt. Prof. Vijay Lamba

Project Guide Project Co-guide

The B.Tech Viva Voce Examination of “Nikhil Sharma, Hemant Kumar, Priyanshu Chauhan”

has been held on _____________ and accepted.

(Asstt. Prof. Rajiv Chechi)

H.O.D

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ABSTRACT

India is world’s largest democracy. Fundamental right to vote or simply voting in elections

forms the basis of Indian democracy.

In India all earlier elections a voter used to cast his vote by using ballot paper. This is a long,

time-consuming process and very much prone to errors.

This situation continued till election scene was completely changed by electronic voting

machine. No more ballot paper, ballot boxes, stamping, etc. all this condensed into a simple

box called ballot unit of the electronic voting machine.

Cell phone based voting machine is capable of saving considerable printing stationery and

transport of large volumes of electoral material. It is easy to transport, store, and maintain. It

completely rules out the chance of invalid votes. Its use results in reduction of polling time,

resulting in fewer problems in electoral preparations, law and order, candidates’ expenditure,

etc. and easy and accurate counting without any mischief at the counting centre.

Our cell phone based voting machine consists of microcontroller ATMEL AT89S51, a

DTMF decoder CM8870C, a memory storage device EEPROM. DTMF is sent to the

microcontroller which is decoded by CM8870C and the password is fed with the candidate

number. The EEPROM is used to store the memory in case of power failure.

This project is based on assembly language programming. The software platform used in this

project are Keil uVision3 and SPIPGM37.

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(iv)

LIST OF TABLES

TABLE NO. TOPIC PAGE NO.

1.1 List of Components 3

1.2 Port 1 Configuration 7

1.3 Port 3 Configuration 8

4.1 Cost Analysis 35

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(v)

LIST OF FIGURES

FIGURE NO. TOPIC PAGE NO.

1.1 Pin Diagram of AT89S51 5

1.2 Block Diagram of AT89S51 10

1.3 Pin Diagram of CM8870C 14

1.4 Pin Diagram of 24C16 16

1.5 Voltage Regulator 7805 17

1.6 Schematic Diagram of LCD 17

1.7 Power Supply 18

1.8 Bridge Rectifier 19

1.9 Basic Forms of Transformer 20

1.10 Diode 20

1.11 Symbol of Capacitor 22

1.12 Capacitor & Battery Connection 22

1.13 LED & LED Symbol 23

3.1 Block Diagram 33

3.2 Circuit Diagram 34

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CONTENTS

CONTENTS Page No.

Certificate (i)

Acknowledgement (ii)

Abstract (iii)

List of Tables (iv)

List of Figures (v)

Chapter 1

 Introduction 1-23

Chapter 2

 Literature Review 24-29

Chapter 3

 PCB Designing 30-31

 Working 32

 Block Diagram 33

 Circuit Diagram 34

Chapter 4

 Cost Analysis 35

 Problem Faced & Troubleshooting 36

Chapter 5

 Conclusion 37

 Future Scope 37

REFERENCES 38

APPENDIX

 Program Coding 39-49

 Datasheets 50-56

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MAJOR PROJECT REPORT: CELL PHONE BASED VOTING MACHINE

DEPARTMENT OF ELECTRONICS & COMMUICATION ENGG.

HARYANA COLLEGE OF TECHNOLOGY & MANAGEMENT

KAITHAL

1

CHAPTER 1

INTRODUCTION & COMPONENTS

INTRODUCTION

The aim of our project is to design & develop a mobile based voting machine. In this project

user can dial the specific number from any land line or mobile phone to cast his vote. Once

the user is connected to the voting machine he can enter his password & choice of vote. If he

has entered a valid choice & password his vote will be caste with two short duration beeps.

For invalid password/choice long beep will be generated. User is allotted 15 seconds to enter

his password & choice. A reset button is provided for resetting the system. A total key is

provided to display the result.

We have also used non-volatile memory for storing all data. EEPROM will preserve all

information in case of power failure.

In this project all information is transmitted through DTMF tones. The major block & their

functions are described in details below.

DTMF DECODER

In DTMF decoder circuit we use IC 8870. IC 8870 converts the dual tones to corresponding

binary outputs.

DTMF SIGNALLING

AC register signaling is used in DTMF telephones, here tones rather than make/break pulse

are used for dialing, each dialed digit is uniquely represented by a pair of sine waves tones.

These tones (one from low group for row and another from high group for column) are sent to

the exchange when a digit is dialed by pushing the key, these tone lies within the speech band

of 300 to 3400 HZ, and are chosen so as to minimize the possibility of any valid frequency

pair existing in normal speech simultaneously. Actually, this minimisator is made possible by

forming pairs with one tone from the higher group and the other from the lower of

frequencies. A valid DTMF signal is the sum of two tones, one from a lower group ( 697-940

Hz) and the other from a higher group ( 1209-1663 Hz). Each group contains four individual

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MAJOR PROJECT REPORT: CELL PHONE BASED VOTING MACHINE

DEPARTMENT OF ELECTRONICS & COMMUICATION ENGG.

HARYANA COLLEGE OF TECHNOLOGY & MANAGEMENT

KAITHAL

2

tones. This scheme allows 10 unique combinations. Ten of these code represent digits 1

through 9 and 0. . tones in DTMF dialing are so chose that none of the tones is harmonic of

are other tone. Therefore is no change of distortion caused by harmonics. Each tone is sent as

along as the key remains pressed. The DTMF signal contains only one component from each

of the high and low group. This significantly simplifies decoding because the composite

DTMF signal may be separated with band pass filters into single frequency components, each

of which may be handled individually.

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MAJOR PROJECT REPORT: CELL PHONE BASED VOTING MACHINE

DEPARTMENT OF ELECTRONICS & COMMUICATION ENGG.

HARYANA COLLEGE OF TECHNOLOGY & MANAGEMENT

KAITHAL

3

COMPONENTS

LIST OF COMPONENTS USED

Table No. 1.1 List of components

Sr. no Equipment Quantity

1 IC AT89S51 MC 1

2 IC MT8870DE 1

3 IC ATMEL AT24C16 1

4 Voltage Regulator 7805 1

5 2 line LCD display 1

6 Transformer 1

7 Crystal Oscillator 2

8 Switch 2

9 LED 2

10 Resistors(1KΩ,10KΩ,47kΩ,100KΩ,330kΩ,) 10

11 Capacitors(22pf,.1μf,10μf,470μf,1000μf) 17

12 Diodes 5

13 Mobile Speaker Port 1

14 Mobile MIC Port 1

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MAJOR PROJECT REPORT: CELL PHONE BASED VOTING MACHINE

DEPARTMENT OF ELECTRONICS & COMMUICATION ENGG.

HARYANA COLLEGE OF TECHNOLOGY & MANAGEMENT

KAITHAL

4

COMPONENT DESCRIPTION

1) MICRO-CONTROLLER AT89S51

FEATURES

 Compatible with MCS-51® Products

 4K Bytes of In-System Programmable (ISP) Flash Memory– Endurance: 1000

Write/Erase Cycles

 4.0V to 5.5V Operating Range

 Fully Static Operation: 0 Hz to 33 MHz

 Three-level Program Memory Lock

 128 x 8-bit Internal RAM

 32 Programmable I/O Lines

 Two 16-bit Timer/Counters

 Six Interrupt Sources

 Full Duplex UART Serial Channel

 Low-power Idle and Power-down Modes

 Interrupt Recovery from Power-down Mode

 Watchdog Timer

 Dual Data Pointer

 Power-off Flag

 Fast Programming Time

 Flexible ISP Programming (Byte and Page Mode)

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MAJOR PROJECT REPORT: CELL PHONE BASED VOTING MACHINE

DEPARTMENT OF ELECTRONICS & COMMUICATION ENGG.

HARYANA COLLEGE OF TECHNOLOGY & MANAGEMENT

KAITHAL

5

DESCRIPTION

The AT89S51 is a low-power, high-performance CMOS 8-bit microcontroller with 4K bytes

of in-system programmable Flash memory. The device is manufactured using Atmel‟s high-
density non-volatile memory technology and is compatible with the industry- standard 80C51

instruction set and pin out. The on-chip Flash allows the program memory to be

reprogrammed in-system or by a conventional non-volatile memory programmer. By

combining a versatile 8-bit CPU with in-system programmable Flash on a monolithic chip,

the Atmel AT89S51 is a powerful microcontroller which provides a highly-flexible and cost-
effective solution to many embedded control applications.

The AT89S51 provides the following standard features: 4K bytes of Flash, 128 bytes of

RAM, 32 I/O lines, Watchdog timer, two data pointers, two 16-bit timer/counters, a five

vector two-level interrupt architecture, a full duplex serial port, on-chip oscillator, and clock

circuitry. In addition, the AT89S51 is designed with static logic for operation down to zero

frequency and supports two software selectable power saving modes. The Idle Mode stops the

CPU while allowing the RAM, timer/counters, serial port, and interrupt system to continue

functioning. The Power-down mode saves the RAM contents but freezes the oscillator,

disabling all other chip functions until the next external interrupt or hardware reset.

PIN DIAGRAM

Figure No. 1.1: Pin Diagram of AT89S51

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MAJOR PROJECT REPORT: CELL PHONE BASED VOTING MACHINE

DEPARTMENT OF ELECTRONICS & COMMUICATION ENGG.

HARYANA COLLEGE OF TECHNOLOGY & MANAGEMENT

KAITHAL

6

PROCESSOR

A processor is an electronic device capable of manipulating data in a way specified by a

sequence of instructions.

INSTRUCTIONS

Instructions in a computer are binary numbers just like data. Different numbers, when read

and executed by a processor, cause different things to happen. The instructions are also called

opcodes or machine codes. Different bit patterns activate or deactivate different parts of the

processing core. Every processor has its own instruction set varying in number, bit pattern

and functionality.

PROGRAM

The sequence of instructions is what constitutes a program. The sequence of instructions may

be altered to suit the application.

ASSEMBLY LANGUAGE

Writing and understanding such programs in binary or hexadecimal form is very difficult ,so

each instructions is given a symbolic notation in English language called as mnemonics. A

program written in mnemonics Form is called an assembly language program. But it must be

converted into machine language for execution by processor.

ASSEMBLER

An assembly language program should be converted to machine language for execution by

processor. Special software called ASSEMBLER converts a program written in mnemonics

to its equivalent machine opcodes.

HIGH LEVEL LANGUAGE

A high level language like C may be used to write programs for processors. Software called

compiler converts this high level language program down to machine code. Ease of

programming and portability.

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MAJOR PROJECT REPORT: CELL PHONE BASED VOTING MACHINE

DEPARTMENT OF ELECTRONICS & COMMUICATION ENGG.

HARYANA COLLEGE OF TECHNOLOGY & MANAGEMENT

KAITHAL

7

PIN DESCRIPTION

VCC: Supply voltage.

GND: Ground.

Port 0: Port 0 is an 8-bit open drain bidirectional I/O port. As an output port, each pin can

sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high-
impedance inputs. Port 0 can also be configured to be the multiplexed low-order address/data

bus during accesses to external program and data memory. In this mode, P0 has internal pull-
ups. Port 0 also receives the code bytes during Flash programming and outputs the code bytes

during program verification. External pull-ups are required during program verification.

Port 1: Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 1 output

buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins, they are pulled

high by the internal pull-ups and can be used as inputs. As inputs, Port 1 pins that are

externally being pulled low will source current (IIL) because of the internal pull-ups.

Table 1.2 : Port 1 Configuration

Port 2: Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 2 output

buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins, they are pulled

high by the internal pull-ups and can be used as inputs. As inputs, Port 2 pins that are

externally being pulled low will source current (IIL) because of the internal pull-ups. Port 2

emits the high-order address byte during fetches from external program memory and during

accesses to external data memory that use 16-bit addresses (MOVX @ DPTR). In this

application, Port 2 uses strong internal pull-ups when emitting 1s.

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MAJOR PROJECT REPORT: CELL PHONE BASED VOTING MACHINE

DEPARTMENT OF ELECTRONICS & COMMUICATION ENGG.

HARYANA COLLEGE OF TECHNOLOGY & MANAGEMENT

KAITHAL

8

Port 3

Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 3 output buffers can

sink/source four TTL inputs. When 1s are written to Port 3 pins, they are pulled high by the

internal pull-ups and can be used as inputs. As inputs, Port 3 pins that are externally being

pulled low will source current (IIL) because of the pull-ups. Port 3 receives some control

signals for Flash programming and verification. Port 3 also serves the functions of various

special features of the AT89S51, as shown in the following table:

Table 1.3: Port 3 Configuration

RST

Reset input. A high on this pin for two machine cycles while the oscillator is running resets

the device. This pin drives High for 98 oscillator periods after the Watchdog times out. The

DISRTO bit in SFR AUXR (address 8EH) can be used to disable this feature. In the default

state of bit DISRTO, the RESET HIGH out feature is enabled.

ALE/PROG

Address Latch Enable (ALE) is an output pulse for latching the low byte of the address during

accesses to external memory. This pin is also the program pulse input (PROG) during Flash

programming. In normal operation, ALE is emitted at a constant rate of 1/6 the oscillator

frequency and may be used for external timing or clocking purposes. Note, however, that one

ALE pulse is skipped during each access to external data memory. If desired, ALE operation

can be disabled by setting bit 0 of SFR location 8EH.

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MAJOR PROJECT REPORT: CELL PHONE BASED VOTING MACHINE

DEPARTMENT OF ELECTRONICS & COMMUICATION ENGG.

HARYANA COLLEGE OF TECHNOLOGY & MANAGEMENT

KAITHAL

9

PSEN

Program Store Enable (PSEN) is the read strobe to external program memory. When the

AT89S51 is executing code from external program memory, PSEN is activated twice each

machine cycle, except that two PSEN activations are skipped during each access to external

data memory.

EA/VPP

External Access Enable. EA must be strapped to GND in order to enable the device to fetch

code from external program memory locations starting at 0000H up to FFFFH. Note,

however, that if lock bit 1 is programmed, EA will be internally latched on reset. This pin

also receives the 12-volt programming enable voltage (VPP) during Flash programming.

XTAL1

Input to the inverting oscillator amplifier and input to the internal clock operating circuit.

XTAL2

Output from the inverting oscillator amplifier

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DEPARTMENT OF ELECTRONICS & COMMUICATION ENGG.

HARYANA COLLEGE OF TECHNOLOGY & MANAGEMENT

KAITHAL

10

PROCESSOR ARCHITECTURE

Figure No. 1.2: Block Diagram of Microcontroller

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DEPARTMENT OF ELECTRONICS & COMMUICATION ENGG.

HARYANA COLLEGE OF TECHNOLOGY & MANAGEMENT

KAITHAL

11

ALU

The Arithmetic Logic Unit (ALU) performs the internal arithmetic manipulation of data line

processor. The instructions read and executed by the processor decide the operations

performed by the ALU and also control the flow of data between registers and ALU.

Operations performed by the ALU are Addition , Subtraction , Not , AND , NAND , OR ,

NOR , XOR , Shift Left/Right , Rotate Left/right , Compare etc. Some ALU supports

Multiplication and Division. Operands are generally transferred from two registers or from

one register and memory location to ALU data inputs. The result of the operation is the

placed back into a given destination register or memory location from ALU output.

REGISTERS

Registers are the internal storage for the processor. The number of registers varies

significantly between processor architectures.

 WORKING REGISTERS

Temporary storage during ALU Operations and data transfers.

 INDEX REGISTERS

Points to memory addresses.

 STATUS REGISTERS

Stores the current status of various flags denoting conditions resulting from various

operations.

 CONTROL REGISTERS

Contains configuration bits that affect processor operation and the operating modes of

various internal subsystems.

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MAJOR PROJECT REPORT: CELL PHONE BASED VOTING MACHINE

DEPARTMENT OF ELECTRONICS & COMMUICATION ENGG.

HARYANA COLLEGE OF TECHNOLOGY & MANAGEMENT

KAITHAL

12

MEMORY

Memory is used to hold data and program for the processor.

 SRAM

Volatile, fast, low capacity, expensive, requires lesser external support circuitry.

 DRAM

Volatile, relatively slow, highest capacity needs continuous refreshing. Hence require

external circuitry.

 OTP ROM

One time programmable, used for shipping in final products.

 EPROM

Erasable programmable, UV Erasing, Used for system development and debugging.

 EEPROM

Electrically erasable and programmable, can be erased programmed in- circuit, Used

for storing system parameters.

 FLASH

Electrically programmable & erasable, large capacity, organized as sectors.

BUSES

A bus is a physical group of signal lines that have a related function. Buses allow for the

transfer of electrical signals between different parts of the processor.

Processor buses are of three types:

 Data bus

 Address bus

 Control bus

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CONTROLLER LOGIC

Processor brain decodes instructions and generate control signal for various sub units. It has

full control over the clock distribution unit of processor.

I/O Peripherals

The I/O devices are used by the processor to communicate with the external world

 Parallel Ports.

 Serial Ports.

 ADC/DAC.

2) IC CM8870

FEATURES

 Full DTMF receiver

 Less than 35mW power consumption

 Industrial temperature range

 Uses quartz crystal or ceramic resonators

 Adjustable acquisition and release times

 18-pin DIP, 18-pin DIP EIAJ, 18-pin SOIC, 20-pin PLCC

DESCRIPTION

The CAMD CM8870/70C provides full DTMF receiver capability by integrating both the

band-split filter and digital decoder functions into a single 18-pin DIP, SOIC, or 20-pin PLCC

package. The CM8870/70C is manufactured using state-of-the-art CMOS process technology

for low power consumption (35mW, MAX) and precise data handling. The filter section uses

a switched capacitor technique for both high and low group filters and dial tone rejection. The

CM8870/70C decoder uses digital counting techniques for the detection and decoding of all

16 DTMF tone pairs into a 4-bit code. This device contains input protection against damage

due to high static voltages or electric fields; however, precautions should be taken to avoid

application of voltages higher than the maximum rating.

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PIN DIAGRAM

Fig No.: Pin Diagram of CM8870C

PIN CONFIGURATION

IN+: Non-inverting

IN–: Inverting

GS: Gain select

VREF: Reference Output Voltage (nominally VDD/2)

INH: Inhibits

OSC3: Digital buffered oscillator output

PD: Power down

OSC1: Clock input

OSC2: Clock output

VSS: Negative power supply

TOE: Three-state output enable (Input)

Q1: Three-state outputs

Q2, Q3, Q4: Tone pair received

StD: Delayed Steering output

ESt: Early steering output

St/Gt: Steering input/guard

VDD: Positive power supply

IC: Internal connection

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3) ATMEL 24C16

FEATURES

 Low-voltage and Standard-voltage Operation

– 2.7 (VCC = 2.7V to 5.5V)

– 1.8 (VCC = 1.8V to 5.5V)

 Internally Organized 128 x 8 (1K), 256 x 8 (2K), 512 x 8 (4K), 1024 x 8 (8K) or 2048

x 8 (16K)

 2-wire Serial Interface

 Schmitt Trigger, Filtered Inputs for Noise Suppression

 Bi-directional Data Transfer Protocol

 100 kHz (1.8V, 2.5V, 2.7V) and 400 kHz (5V) Compatibility

 8-byte Page (1K, 2K), 16-byte Page (4K, 8K, 16K) Write Modes

 Partial Page Writes are Allowed

 Self-timed Write Cycle (10 ms max)

 High-reliability

– Endurance: 1 Million Write Cycles

– Data Retention: 100 Years

 Automotive Grade and Extended Temperature Devices Available

 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead MAP and 8-lead TSSOP Packages

DESCRIPTION

The AT24C01A/02/04/08/16 provides 1024/2048/4096/8192/16384 bits of serial electrically

erasable and programmable read-only memory (EEPROM) organized as

128/256/512/1024/2048 words of 8 bits each. The device is optimized for use in many

industrial and commercial applications where low-power and low-voltage operation are

essential. The AT24C01A/02/04/08/16 is available in space-saving 8-pin PDIP, 8-lead

JEDEC SOIC, 8-lead MAP and 8-lead TSSOP packages and is accessed via a 2-wire serial

interface.

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PIN DIAGRAM

Fig No. Pin Diagram of AT 24C16

PIN CONFIGURATION

A0 - A2 : Address Inputs

SDA : Serial Data

SCL : Serial Clock Input

WP : Write Protect

NC : No Connect

GND : Ground

4) VOLTAGE REGULATOR

FEATURES

 Output current in Excess of 1.0 A

 No external component required

 Internal thermal overload protection

 Internal short circuit current limiting

 Output transistor safe-area compensation

 Output voltage offered in 2% and 4% tolerance

 Available I n surface mount D2PAK and standard 3-lead transistor packages

 Previous commercial temperature range has been extended to a junction temperature

range of -40 degree C to +125 degree C.

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DESCRIPTION

Voltage regulator ICs are available with fixed (typically 5, 12 and 15V) or variable output

voltages. The maximum current they can pass also rates them. Negative voltage regulators are

available, mainly for use in dual supplies. Most regulators include some automatic protection

from excessive current and overheating (thermal protection). Many of fixed voltage regulator

ICs has 3 leads. They include a hole for attaching a heat sink if necessary.

Figure No. 1.5: 7805 Voltage Regulator

5) LCD DISPLAY

This is the first interfacing example for the Parallel Port. We will start with something simple.

This example doesn’t use the Bi-directional feature found on newer ports, thus it should work

with most, if not all Parallel Ports. These LCD Modules are very common these days, and are

quite simple to work with, as all the logic required to run them is on board.

Figure No. 1.8: Schematic Diagram of LCD Display

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CIRCUIT DESCRIPTION

The LCD panel’s Enable and Register Select is connected to the Control Port. The Control

Port is an open collector / open drain output. While most Parallel Ports have internal pull-up

resistors, there is a few which don’t. Therefore by incorporating the two 10K external pull up

resistors, the circuit is more portable for a wider range of computers, some of which may have

no internal pull up resistors.

We make no effort to place the Data bus into reverse direction. Therefore we hard wire the

R/W line of the LCD panel, into write mode. This will cause no bus conflicts on the data

lines. As a result we cannot read back the LCD’s internal Busy Flag which tells us if the LCD

has accepted and finished processing the last instruction. This problem is overcome by

inserting known delays into our program.

The 10k Potentiometer controls the contrast of the LCD panel. Nothing fancy here. As with

all the examples, I’ve left the power supply out. You can use a bench power supply set to 5v

or use an onboard +5 regulator. Remember a few de-coupling capacitors, especially if you

have trouble with the circuit working properly.

6) POWER SUPPLY

Figure No. 1.10: Power Supply

AC

Suppl

y

D1

D2

D3

D4

1

B 2

A

3 4

7805

1000 F + +

- -

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BRIDGE RECTIFIER

Bridge rectifier circuit consists of four diodes arranged in the form of a bridge as shown in

figure.

Figure No. 1.11: Bridge Rectifier

OPERATION

During the positive half cycle of the input supply, the upper end A of the transformer

secondary becomes positive with respect to its lower point B. This makes Point1 of bridge

positive with respect to point 2. The diode D1 & D2 become forward biased & D3 & D4

become reverse biased. As a result a current starts flowing from point1, through D1 the load

& D2 to the negative end .During negative half cycle, the point2 becomes positive with

respect to point1. Diodes D1 & D2 now become reverse biased .Thus a current flow from

point 2 to point1.

7) TRANSFORMER

PRINCIPLE OF THE TRANSFORMER

Two coils are wound over a Core such that they are magnetically coupled. The two coils are

known as the primary and secondary windings.

In a Transformer, an iron core is used. The coupling between the coils is source of making a

path for the magnetic flux to link both the coils. A core as in fig.2 is used and the coils are

wound on the limbs of the core. Because of high permeability of iron, the flux path for the

AC Supply

Load

+ -

D1

D2

D3

D4

1

B 2

A

3 4

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flux is only in the iron and hence the flux links both windings. Hence there is very little

„leakage flux‟. This term leakage flux denotes the part of the flux, which does not link both

the coils, i.e., when coupling is not perfect. In the high frequency transformers, ferrite core is

used. The transformers may be step-up, step-down, frequency matching, sound output,

amplifier driver etc. The basic principles of all the transformers are same.

Figure 2.12: Basic Forms of Transformer

8) DIODE

The diode is a p-n junction device. Diode is the component used to control the flow of the

current in any one direction. The diode widely works in forward bias.

Figure No. 1.13: Diode

When the current flows from the P to N direction. Then it is in forward bias. The Zener diode

is used in reverse bias function i.e. N to P direction. Visually the identification of the diode`s

terminal can be done by identifying he silver/black line. The silver/black line is the negative

terminal (cathode) and the other terminal is the positive terminal (cathode).

APPLICATION

 Diodes: Rectification, free-wheeling, etc

 Zener diode: Voltage control, regulator etc.

 Tunnel diode: Control the current flow, snobbier circuit, etc

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9) RESISTORS

The flow of charge through any material encounters an opposing force similar in many

respects to mechanical friction .this opposing force is called resistance of the material .in

some electric circuit resistance is deliberately introduced in form of resistor. Resistor used fall

in three categories , only two of which are color coded which are metal film and carbon film

resistor .the third category is the wire wound type ,where value are generally printed on the

vitreous paint finish of the component. Resistors are in ohms and are represented in Greek

letter omega, looks as an upturned horseshoe. Most electronic circuit require resistors to make

them work properly and it is obliviously important to find out something about the different

types of resistors available. Resistance is measured in ohms, the symbol for ohm is an omega

ohm. 1 ohm is quite small for electronics so resistances are often given in kohm and Mohm.

Resistors used in electronics can have resistances as low as 0.1 ohm or as high as 10 Mohm.

Figure No. 1.14: Symbol of Resistance

TESTING

Resistors are checked with an ohm meter/millimeter. For a defective resistor the ohm-meter shows

infinite high reading.

10) CAPACITORS

In a way, a capacitor is a little like a battery. Although they work in completely different

ways, capacitors and batteries both store electrical energy. If you have read How Batteries

Work, then you know that a battery has two terminals. Inside the battery, chemical reactions

produce electrons on one terminal and absorb electrons at the other terminal.

BASIC

Like a battery, a capacitor has two terminals. Inside the capacitor, the terminals connect to

two metal plates separated by a dielectric. The dielectric can be air, paper, plastic or anything

else that does not conduct electricity and keeps the plates from touching each other. You can

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easily make a capacitor from two pieces of aluminum foil and a piece of paper. It won’t be a

particularly good capacitor in terms of its storage capacity, but it will work.

In an electronic circuit, a capacitor is shown like this:

Figure No. 1.17: Symbol of Capacitor

When you connect a capacitor to a battery, here‟s what happens:

The plate on the capacitor that attaches to the negative terminal of the battery accepts

electrons that the battery is producing.

 The plate on the capacitor that attaches to the positive terminal of the battery loses

electrons to the battery.

Figure No. 1.18: Capacitor & Battery Connection

TESTING

To test the capacitors, either analog meters or special digital meters with the specified

function are used. The non-electrolyte capacitor can be tested by using the digital meter.

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11) LED

LED falls within the family of P-N junction devices. The light emitting diode (LED) is a

diode that will give off visible light when it is energized. In any forward biased P-N junction

there is, with in the structure and primarily close to the junction, a recombination of hole and

electrons. This recombination requires that the energy possessed by the unbound free electron

be transferred to another state. The process of giving off light by applying an electrical source

is called electroluminescence.

LED is a component used for indication. All the functions being carried out are displayed by

led .The LED is diode which glows when the current is being flown through it in forward bias

condition. The LEDs are available in the round shell and also in the flat shells. The positive

leg is longer than negative leg.

12) CRYSTAL OSCILLATORS

Crystal oscillators are oscillators where the primary frequency determining element is a

quartz crystal. Because of the inherent characteristics of the quartz crystal the crystal

oscillator may be held to extreme accuracy of frequency stability. Temperature compensation

may be applied to crystal oscillators to improve thermal stability of the crystal oscillator.

Crystal oscillators are usually, fixed frequency oscillators where stability and accuracy are the

primary considerations. For example it is almost impossible to design a stable and accurate

LC oscillator for the upper HF and higher frequencies without resorting to some sort of

crystal control. Hence the reason for crystal oscillators. The frequency of older FT-243

crystals can be moved upward by crystal grinding.

Figure No. 1.19: LED & LED Symbol

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CHAPTER 2

LITERATURE REVIEW

PREHISTORY: 8048

In fact, it should have started with chapter -2, the invention of microprocessor. Intel

introduced a single-chip processor, the 4004, in 1971. It was a 4-bit microprocessor, with

whopping processing speed of 100 thousand operations per second, and was meant for an

electronic calculator. There is a lot of 4-bit processing in calculators, especially if the

software is based on BCD arithmetics. Later Intel introduced the 8-bitter 8008 and it’s grown-
up brother - the famous 8080 (which then was perfected by an ex-Intel employee as Zilog

Z80, one of the best 8-bit microprocessors of all times).

In 1976, Intel introduced its first microcontroller, 8048. It integrated the processing core with

code and data memory and certain peripherals. The code memory was a 1kB mask ROM

(defined by the last metallisation mask during the chip processing) or EPROM (after all, Intel

invented EPROM), the data memory was 64 bytes of RAM (including the 8-level stack and

two pages of eight general purpose registers). Besides general-purpose I/O (see below),

peripherals included a timer and an external interrupt (plus the necessary interrupt system).

Although the 8048 is clearly an 8-bit architecture, it is said to be an ancestor of the 4-bit 4004

rather than the 8080. Also it is said to bear remarkable similarities to Fairchild F8

microprocessor. Today, it is hard to say whether something of this is true, but one thing is

sure, the 8048 has a couple of strange features. Using four of its general purpose input/output

ports, and adding one or more 8243-type chip - and the I/O expand into another four 4-bit

ports. This expansion has not only support in the hardware - dedicated pins on 8048 - but also

in the instruction set, having dedicated instructions for I/O operations (including AND and

OR(!)) via the expander.

The 8048 already had a lot of useful features known well to 8051-users: external code

memory support; external data memory support (inherently only 256 bytes addressed

indirectly by R0 and R1 as there is no 16 bit pointer register such as the DPTR in 8051 - the

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8051 inherited this 8-bit external data access); quasibidirectional I/O ports. Maximum clock is

11MHz, but an instruction cycle takes 15 oscillator clocks. The “A” version (advanced)

introduced powerdown mode

There were multiple variations of the 8048 around, mostly with different numbering, but

generally denoted as the MCS-48 family. 8048 itself denoted a mask-ROM part, 8748 an

EPROM part - windowed (CERDIP - erasable) for development, and unwindowed (PDIP)

OTP. The romless part was a bit surprisingly marked 8035 (probably most of the parts sold as

romless were parts with unusable ROM, due to error in the “programmed” firmware). There

was a low-cost version with reduced pin count and omitted some of the features as 8021, and

versions with more ROM and RAM as 8049 (2kB ROM/128B RAM) and 8050 (4kB

ROM/256B RAM); with ROMless versions as 8039 and 8040; and 8049 had also an EPROM

version 8749 (the funny thing is, that 8749 came in 1981, one year after 8051/8751). 8048’s

were second sourced by a number of manufacturers, including NEC, Toshiba, and were

cloned also behind the then iron curtain in Czechoslovakia (Tesla MHB8048/8035) and

USSR. Application specific versions of 8048 were also built quite early, with adding of

various peripherals, such as 8-bit ADC in 8022 and a parallel-bus slave interface in

8041/8042.

The MCS-48 family was used in a quite wide range of applications. One of the first

applications of 8048 was in a gaming console (Magnavox Odyssey2), but there were also

more “serious” applications, for example in one of the first car engine “computerized” control

units. But the biggest hit came when IBM decided to use 8048 in its original PC keyboard.

Although in the AT keyboard IBM used the (presumably cheaper) 6805, it used 8042 as a co-
processor on the mainboard, communicating with the keyboard. The 8042 is still present in

almost each and every PC even today, but don’t search for a chip with “8042″ on it - it is

integrated in the chipset. It may come as a surprise to somebody, but thanks to this fact the

8048 with its derivatives is most probably the most widespread microcontroller at all.

As in the 70s there were no pdf-s and no world-wide web, datasheets and other

documentation is hardly available over the internet. I believe Intel will give out a copy if one

really wants it (there is a “literature request” form at their “museum” pages). However, there

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seems to be a couple of enthusiastic people, one of the maintaining a wonderful document

called “Grokking the MCS-48 System” at http://home.mnet-online.de/al/mcs-48/mcs-48.pdf .

8051: THE CLASSICS

In 1980, Intel introduced the successor to 8048, the 8051.

Intel made sure that the transition from the already successful model will be as smooth as

possible. Architecturally, the 8051 is an extension to 8048. Almost every feature and resource

of 8048 is present in 8051 in same or superior form. 4kB ROM and 128B RAM on chip. Pin

compatibility was not maintained, but it was not a real issue. Software compatibility is not

binarywise but source-wise, but that is also acceptable. The preliminary datasheet read:

“Enhanced MCS-48 Architecture”.

The extensions included code and data memory extended to 64kB with appropriate support in

instruction set and registers (DPTR), relative conditional and unconditional jumps

(conditionals and DJNZ were constrained within a 256-byte page in 8048), four register banks

instead of two, “unlimited” stack (8048 had stack limited to 16 bytes), multiple and divide

instructions. As for peripherals, second timer was added and both were extended to 16 bits

with multiple modes (including 8-bit autoreload mode), and an UART (which was a luxury

that many lower-end

microcontrollers didn’t have even a couple of years ago). The raw clock frequency did not

increase considerably, being 12MHz, but an instruction cycle is 12 clocks now.

Similarly to 8048, also the 8051 had variants, but there was no cut-down “low-cost” version

(presumably because of the cost of ROM/RAM and the DIP40 package went low enough).

The romless version was 8031 and the EPROM version was 8751. The “extended” version -

8052 (with 8032 and 8752) came 3 years later and featured besides 8kB ROM and 256B

RAM also an extra 16-bit timer. An unusual chip was the 8052AH-BASIC, which according

to Intel was “software-onsilicon version of the 8052 microcontroller with a BASIC interpreter

on-chip in 8K ROM”. The

whole family was eventually called MCS-51 and was manufactured in NMOS, since 1986 in

CMOS.

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Intel provided all the needed initial tools and support with the 8051 - assembler, application

notes, example software, in-circuit emulator. Some of the appnotes and software still can be

found on Intel’s webpages and are of excellent quality. The basic datasheet set - dubbed in the

community as “the bible” - is still THE reference source of information on 8051 and its

derivatives, even today.

So, Intel did its job, providing everything needed to make 8051 successful, and the rest is

history.

THE BIRDS ARE OUT OF THE NEST

Similar to 8048, also the 8051 has been licensed to various manufacturers worldwide. Some

of the early adopters include Philips, Signetics, MHS (Matra) and Siemens. Most of these

companies don’t exist any more, some have been taken over, others have been renamed; but

most of them still manufacture some derivative of 8051.

The licensees started to make fully compatible models. Naturally, they took over also the

datasheets, for example the “bible” is better used in the Philips version, which is a verbatim

copy of the Intel version, except that it is a true searchable pdf, while the Intel is a scanned

copy of paper document, unsearchable. More than that, the manufacturers took over the

annoying practice of Intel to include in datasheets only the specific differences to the “bible”,

very confusing for the newbies (but there are opinions on this, some of the users consider this

arrangement

better than having huge datasheets containing all the “common” details). The manufacturers

published their own appnotes, which all together form a huge knowledge base and code

library, but… due to competition it is scattered across the manufacturers’ sites, an another

confusing fact for the newbies.

Later, the manufacturers rolled out their own derivatives and variants with varying marking -

there is no real standard in it (although there are some idiosyncrasies present in the marking

of most manufacturers). All types of modifications described in the following chapters were

applied; but the compatibility to the original 8051 was usually maintained. This, together with

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the availability of second-, third-,…,35th-,…-source of 8051 is the true source of its

immortality.

EMBEDDED IN EMBEDDED

Intel and the licensees soon realized that 8051 is a nice core that can be embedded in various

ASIC chips to perform setup and control tasks. Typically, the resources of the ASIC are

mapped as external data memory, as if the ASIC would be connected to a conventional 8051

chip. This approach allows to use an unmodified core, which speeds up the chip development

and decreases the chance for error; also the ASIC could be breadboard-prototyped in this

form easily.

As an example, Intel produced 80C51SL, a descendant of 8042. Philips has a line of 8051-

based teletext controllers. In a particular USB webcamera, the chip interfacing the CCD and

USB was controlled by an embedded 8051. There are probably much more examples around,

but most of them never get public. In spite of this, the 8051 in this form is produced probably

in much higher volumes than as general-purpose microcontrollers.

EXTRAS

Besides application-specific, also general purpose derivatives have been introduced by Intel

and the licensees, with enhanced features and increased code and data memories. In contrast

with the ASICs mentioned above, these chips tend to implement the extra features in the core

itself, accessed usually via extra SFRs. This allows faster code as SFRs are accessed by all the

instructions using direct addressing (mov, logic), and some of them by the bit-manipulation

instructions, too.

One of the first such derivative by Intel was the 80C51FA, which introduced the

programmable counter array (PCA) (and was a 8052 otherwise). It was intended for

automotive applications (brake control). Soon, FB and FC continued, with more and more

code memory. 80C51RA/RB/RC followed, with added “internal external” data memory.

These were the basis for the today’s 89C51RD2 “sub-family”, produced by Philips, Atmel (as

ex-Temic), SST and Winbond.

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FAT BOYS: 16-BIT EXTENSIONS

When the 8051 was accepted widely enough, some of the applications started to grow and

soon required more power than the 8051 even with enhancements could provide. There were

16-bit microcontrollers around (e.g. Intel had it’s 80C196 line), but it seemed a good idea to

provide a more natural migration path by creating a 16-bit version of 8051.

Intel addressed the problem by introducing 80C251. It went all the way to achieve

compatibility - it was able to run 8051 binary code (being able to switch to native 16-bit 251-

mode) and had a package pin-compatible with 8051. It was not a big success, most probably

for bad market timing (although it is second sourced by Temic/Atmel).

Philips on the other hand employed source-compatibility for its XA family, which seems to

be adequate for most of the applications, where legacy code has to be maintained or parallel

development with 8051 is needed; and poses little constraint on the chip design itself.

All in all, the 16-bit versions of 8051 gained far less popularity than the 8051 and are less

widespread.

FLASH FOR THE MASSES

In the 90s, Atmel introduced a derivative of 8051 with Flash code memory, enabling fast

erasure and reprogramming. It enabled to use the production-grade chip in development, and

enabled the chips used in the product to be reprogrammed when upgrade or a bugfix was

needed, cutting down costs. It brought down the 8051 to the masses - the small “garage”

companies and hobbyists. Besides that, Atmel introduced also 89C2051 with decreased pin

count (and price).This was a smart move, the chip proved to be extremely popular in many

small applications.

Today, virtually all manufacturers produce 8051 derivatives with Flash, most of them able to

be programmed via some few-pin serial interface (called in-situ programming (ISP), SPI-style

or UART-style) and the higher-end versions also able to reprogram themselves (in-
application programming, IAP). MaskROM and EPROM - windowed or OTP - seems to

become extinct, at least in the mainstream applications.

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DEPARTMENT OF ELECTRONICS & COMMUICATION ENGG.

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KAITHAL

30

CHAPTER 3

P.C.B. DESIGNING & WORKING

1) P.C.B. DESIGNING

P.C.B. LAYOUT

The entire circuit can be easily assembled on a general purpose P.C.B. board respectively.

Layout of desired diagram and preparation is first and most important operation in any printed

circuit board manufacturing process. First of all layout of component side is to be made in

accordance with available components dimensions.

The following points are to be observed while forming the layout of P.C.B.

1. Between two components, sufficient space should be maintained.

2. High voltage/max dissipated components should be mounted at sufficient distance

from semiconductor and electrolytic capacitors.

3. The most important points are that the components layout is making proper

compromise with copper side circuit layout.

Printed circuit board (P.C.B.s) is used to avoid most of all the disadvantages of conventional

breadboard. These also avoid the use of thin wires for connecting the components; they are

small in size and efficient in performance.

PREPARING CIRCUIT LAYOUT

First of all the actual size circuit layout is to be drawn on the copper side of the copper clad

board. Then enamel paint is applied on the tracks of connection with the help of a shade

brush. We have to apply the paints surrounding the point at which the connection is to be

made. It avoids the disconnection between the leg of the component and circuit track. After

completion of painting work, it is allowed to dry.

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KAITHAL

31

DRILLING

After completion of painting work, holes 1/23inch(1mm) diameter are drilled at desired

points where we have to fix the components.

ETCHING

The removal of excess of copper on the plate apart from the printed circuit is known as

etching. From this process the copper clad board wit printed circuit is placed in the solution of

FeCl with 3-4 drops of HCL in it and is kept so for about 10 to 15 minutes and is taken out

when all the excess copper is removed from the P.C.B.

After etching, the P.C.B. is kept in clean water for about half an hour in order to get P.C.B.

away from acidic, field, which may cause poor performance of the circuit. After the P.C.B.

has been thoroughly washed, paint is removed by soft piece of cloth dipped I thinner or

turbine. Then P.C.B. is checked as per the layout, now the P.C.B. is ready for use.

SOLDERING

Soldering is the process of joining two metallic conductor the joint where two metal

conductors are to be join or fused is heated with a device called soldering iron and then as

allow of tin and lead called solder is applied which melts and converse the joint. The solder

cools and solidifies quickly to ensure is good and durable connection between the jointed

metal converting the joint solder also present oxidation.

SOLDERING AND DESOLDERING TECHIQUES:

These are basically two soldering techniques.

 Manual soldering with iron.

 Mass soldering.

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DEPARTMENT OF ELECTRONICS & COMMUICATION ENGG.

HARYANA COLLEGE OF TECHNOLOGY & MANAGEMENT

KAITHAL

32

2) WORKING OF PROJECT

The working of this project is controlled by a microcontroller ATMEL AT89C51 and a

DTMF decoder CM8870 is used for decoding key tones of cell phone and EEPROM is used

for memory storage. The project works in the following ways:

1. Switch on power supply.

2. Message wait will appear on LCD.

3. Type #22 followed with candidate number to enter the vote where 22 is the password.

4. If vote is casted then “vote casted successfully” on the LCD & if not then “invalid

vote try again” will appear.

5. To check the number of vote press the button on the PCB and number of votes of each

candidate & total number of vote will appear on LCD.

6. A reset key is present to reset the microcontroller.

.

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KAITHAL

33

Step Down

T/F

Full Wave

Bridge

Rectifier

Voltage

Regulator

DTMF Decoder

(MM8870)

MOBILE PHONE

LCD

Microcontroller Display

AT89C2051

+5VDC/500mA

230V

AC

EEPROM

(24C16)

3) BLOCK DIAGRAM

Figure No. 3.1: Block Diagram

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MAJOR PROJECT REPORT: CELL PHONE BASED VOTING MACHINE

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34

4) CIRCUIT DIAGRAM

Figure No. 3.2: Circuit Diagram

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KAITHAL

35

CHAPTER 4

COST ANALYSIS & TROUBLESHOOTING

COST ANALYSIS OF COMPONENTS USED

Table no. 4.1: Cost Analysis

Sr. no Equipment Quantity Rate (in Rs.)

1 IC AT89S51 MC 1 120

2 IC MT8870DE 1 80

3 IC ATMEL AT24C16 1 85

4 Voltage Regulator 7805 1 20

5 2 line LCD display 1 150

6 Transformer 1 60

7 Crystal Oscillator 2 10

8 Switch 2 8

9 LED 2 6

10 Resistors(1KΩ,10KΩ,47kΩ,100KΩ,330kΩ,) 10 15

11 Capacitors(22pf,.1μf,10μf,470μf,1000μf) 17 25

12 Diodes 5 10

13 Mobile Speaker Port 1 20

14 Mobile MIC Port 1 20

TOTAL 629

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PROBLEM FACED

 First problem that was in making the circuit of METRO TRAIN PROTOTYPE that, it is

difficult to match time with rotation of stepper motor & LCD.

 Second problem is faced due to redundancy in handling the rotation of STEPPER MOTOR

 We have to take extra care while soldering 2 line LCD

 During soldering, many of the connection become short cktd. So we desolder the

connection and did soldering again.

 A leg of the crystal oscillator was broken during mounting. So it has to be replaced.

 LED`s get damaged when we switched ON the supply so we replace it by the new

one.

TROUBLESHOOT

 Care should be taken while soldering. There should be no shorting of joints.

 Proper power supply should maintain.

 Project should be handled with care since IC are delicate

 Component change and check again circuit

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MAJOR PROJECT REPORT: CELL PHONE BASED VOTING MACHINE

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KAITHAL

37

CHAPTER 5

CONCULSION

FUTURE SCOPE

 Number of candidates could be increased by using other microcontroller.

 It could be interfaced with printer to get the hard copy of the result almost instantly from

the machine itself.

 It could also be interfaced with the personal computer and result could be stored in the

central server and its backup could be taken on the other backend servers.

 Again, once the result is on the server it could be relayed on the network to various

offices of the election conducting authority. Thus our project could make the result

available any corner of the world in a matter of seconds

AREA OF APPLICATIONS

 Fast track voting which could be used in small scale elections, like resident welfare

association, “panchayat” level election and other society level elections.

 It could also be used to conduct opinion polls during annual share holders meeting.

 It could also be used to conduct general assembly elections where number of

candidates are less than or equal to eight in the current situation.

 It is used in various TV serials as for public opinion.

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HARYANA COLLEGE OF TECHNOLOGY & MANAGEMENT

KAITHAL

38

REFRENCES

 Muhammad Ali Mazidi , Janice Gillispie Mazidi, Rolin D. Mckinlay.

Second edition, “THE 8051 MICROCONTROLLER AND EMBEDDED SYSTEM”

 K. J. Ayala. Third edition, “The 8051 MICROCONTROLLER”

 Tutorial on microcontroller:

www.8051projects.net/microcontroller_tutorials/

 Tutorial on LCD:

www.8051projects.net/lcd-interfacing/

WEBSITES

 www.atmel.com

 www.seimens.com

 www.howstuffworks.com

 www.alldatasheets.com

 www.efyprojects.com

 www.google.com

 www.eci.gov.in/Audio_VideoClips/presentation/EVM.ppt

 www.rajasthan.net/election/guide/evm.htm

 www.indian-elections.com/electoralsystem/electricvotingmachine.html

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DEPARTMENT OF ELECTRONICS & COMMUICATION ENGG.

HARYANA COLLEGE OF TECHNOLOGY & MANAGEMENT

KAITHAL

39

APPENDIX

CODING

SOFTWARE:-

#include<8051.h>

#include

#include

#include

#include

#include

#include

#define DTMF_PORT P1

#define DTMF_READY P3_BITS.B2

#define TIMER0_INT ET0

#define DELAY1 (65536 - 50000)

#define RESET_KEY P2_BITS.B7

void interrupt dtmf_isr(void);

void interrupt timer0_isr(void);

void on_ack(void);

void off_ack(void);

const char msg_1[] = {”***WELCOME TO***”};

const char msg_2[] = {” MOBILE VOTING. “};

const char msg_3[] = {” TOTAL VOTE “};

const char msg_4[] = {”CANDIDATE-1 VOTE”};

const char msg_5[] = {”CANDIDATE-2 VOTE”};

const char msg_6[] = {”CANDIDATE-3 VOTE”};

const char msg_7[] = {”CANDIDATE-4 VOTE”};

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const char msg_8[] = {”NEW VOTER ONLINE”};

const char msg_9[] = {”Please Wait…..”};

const char msg_10[] = {” Invalid Vote “};

const char msg_11[] = {”Ask to Try Again”};

const char msg_12[] = {” VOTE CASTED “};

const char msg_13[] = {” SUCCESSFULLY “};

const char msg_14[] = {”SYSTEM RESET IN “};

const char msg_15[] = {”PROCESS PLS WAIT”};

unsigned char dtmf_data,dtmf_sts,page_add,data_add,data_status;

unsigned char VoteTotal,VoteC1,VoteC2,VoteC3,VoteC4;

unsigned char Data1,Data2,Data3,Data4,Data5,DataCounter;

unsigned int Timer;

void main()

{

P0 = 0xff;

P1 = 0xff;

P2 = 0xff;

P3 = 0xff;

VoteTotal = 0;

VoteC1 = 0;

VoteC2 = 0;

VoteC3 = 0;

VoteC4 = 0;

ACK_SIGNAL = OFF;

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41

DTMF_READY = ON;

DTMF_PORT = 0xff;

DTMF_INT = 0;

ET0 = 0;

ET1 = 0;

TR0 = 0;

do

{

if(!RESET_KEY)

{

Timer = 50;

while((Timer > 0) && (!RESET_KEY));

if(Timer == 0)

{

wr_lcd_cmd(LINE1);

wr_lcd_data(msg_14[]);

wr_lcd_cmd(LINE2);

wr_lcd_data(msg_15[]);

for(data_add = 0;data_add < 255;data_add++)

{

write_eprom(0×00,data_add,0×00);

}

}

}

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if(!TOTAL_KEY)

{

VoteC1 = 0;

VoteC2 = 0;

VoteC3 = 0;

VoteC4 = 0;

VoteTotal = 0;

for(data_add = 0;data_add < 100;data_add++)

{

data_status = read_eprom(0×00,data_add);

if(data_status == 1)

{

VoteC1++;

VoteTotal++;

}

else

if(data_status == 2)

{

VoteC2++;

VoteTotal++;

}

else

if(data_status == 3)

{

VoteC3++;

VoteTotal++;

}

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43

else

if(data_status == 4)

{

VoteC4++;

VoteTotal++;

}

}

wr_lcd_cmd(LINE1);

wr_lcd_data(”C1 = “);

wr_lcd_data(VoteC1);

wr_lcd_data(”, C2 = “);

wr_lcd_data(VoteC2);

wr_lcd_cmd(LINE2);

wr_lcd_data(”C3 = “);

wr_lcd_data(VoteC3);

wr_lcd_data(”, C4 = “);

wr_lcd_data(VoteC4);

Timer = 100;

while(Timer);

wr_lcd_cmd(LINE1);

wr_lcd_data(msg_3[mi]);

wr_lcd_cmd(LINE2);

wr_lcd_data(VoteTotal);

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Timer = 50;

while(Timer);

}

if(dtmf_sts == 1)

{

dtmf_sts = 0;

}

}

while((Timer > 0) && (dtmf_sts == 0));

if(Timer > 0)

{

if(dtmf_sts == 1)

{

dtmf_sts = 0;

Data4 = dtmf_data;

DataCounter++;

}

}

while((Timer > 0) && (dtmf_sts == 0));

if(Timer > 0)

{

if(dtmf_sts == 1)

{

dtmf_sts = 0;

Data5 = dtmf_data;

DataCounter++;

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}

}

if(DataCounter == 5)

{

if((Data1 == 12) && (Data5 == 12))

{

if((Data4 > 0) && (Data4 < 5))

{

if(Data2 == 10)

{

Data2 - = 10;

}

data_add = Data2 * 10;

data_add += Data3;

if((data_add > 0) && (data_add < 100))

{

data_status =

read_eprom(0×00,data_add);

if(data_status == 0)

{

write_eprom(0×00,data_add,Data4);

DataCounter = 0;

}

}

}

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}

}

if((DataCounter > 0) && (DataCounter <= 5))

{

wr_lcd_cmd(LINE1);

wr_lcd_data(msg_10[]);

wr_lcd_cmd(LINE2);

wr_lcd_data(msg_11[]);

DataCounter = 0;

BUZZER = BUZZER_ON;

off_ack();

off_ack();

off_ack();

off_ack();

off_ack();

off_ack();

off_ack();

off_ack();

off_ack();

off_ack();

off_ack();

off_ack();

off_ack();

off_ack();

off_ack();

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off_ack();

BUZZER = BUZZER_OFF;

}

else

{

wr_lcd_cmd(LINE1);

wr_lcd_data(msg_12[]);

wr_lcd_cmd(LINE2);

wr_lcd_data(msg_13[]);

off_ack();

Timer = 50;

while(Timer);

}

}

wr_lcd_cmd(LINE1);

wr_lcd_data(msg_1[]);

wr_lcd_cmd(LINE2);

wr_lcd_data(msg_2[]);

}while(1);

}

void interrupt timer0_isr(void)

{

if(Timer > 0)

{

Timer–;

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}

TL0 = DELAY1 & 0×0f;

TH0 = DELAY1/256;

}

void interrupt dtmf_isr(void)

{

dtmf_data = DTMF_PORT;

dtmf_data = dtmf_data & 0×0f;

}

void on_ack(void)

{

unsigned char i,j;

for(i=0;i<255;i++)

for(j=0;j<50;j++);

for(i=0;i<255;i++)

{

for(j=0;j<70;j++);

ACK_SIGNAL = ~ACK_SIGNAL;

}

ACK_SIGNAL = OFF;

}

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void off_ack(void)

{

unsigned char i,j;

for(i=0;i<255;i++)

for(j=0;j<50;j++);

for(i=0;i<255;i++)

{

for(j=0;j<70;j++);

ACK_SIGNAL = ~ACK_SIGNAL;

}

ACK_SIGNAL = OFF;

for(i=0;i<255;i++)

for(j=0;j<50;j++);

for(i=0;i<255;i++)

{

for(j=0;j<70;j++);

ACK_SIGNAL = ~ACK_SIGNAL;

}

ACK_SIGNAL = OFF;

}

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